UIST: Data Acquisition, Cabling and the ARC Controller

The UIST array is controlled by an Astronomical Research Camera (ARC - formerly SDSU) 32-channel IR controller.

The Aladdin III 1024x1024 array is split into four electronically-separate quadrants. The quadrants are arranged as follows:

• quadrant 1 = top left
• quadrant 2 = top right
• quadrant 3 = bottom left
• quadrant 4 = bottom right

A single DAC cable is connected to the top two quadrants; the lower two quadrants use a second DAC cable.

The Timing Board in the controller is the master of all other boards. All the bias and clock levels are set on Clock and Video Boards. The timing board also generates the waveforms used to read out the array. The clock board buffers the waveforms and sets the correct voltage levels.

There is one video board per quadrant (so a problem in a single quadrant may be associated with a faulty video board). Each of the video boards has 8 ADCs (analogue-to-digital converters) giving a total of 32 video channels. The timing board in the controller triggers each of these ADCs simultaneously, so that the signal on 32 pixels is digitised in parallel.

The array is read out from the corners to the middle (pixel ~ 512,512). In each quadrant 8 pixels are read out simultaneously: A fast clock moves the readout along rows to the next block of 8 pixels in each quadrant (from left to right in quadrants 1 and 3, and right to left in quadrants 2 and 4); a slower clock then scans down the 16 columns - from y=1024 to y=513 in the top two quadrants, and up the 16 columns - from y=1 to y=512 in the lower two quadrants. In this way, the central rows on the array are read LAST, and so are more susceptible to saturation.

In each quadrant, 64 channels (each consisting of 8 columns) must therefore be readout in each read. The minimum read time with full-array NDSTARE and CDS is 0.622 seconds. Thus, each pixel is addressed in 0.622/[64*512]=20e-6 seconds (20 microseconds) - IS THIS RIGHT?? The thermal readout modes address each pixel four-times faster.

This page refers to the ARC conytroller installed in December 2006. The old EDICT page is available here.